Struct riot_sys::NRF_TWIS_Type[][src]

#[repr(C)]
pub struct NRF_TWIS_Type {
Show 40 fields pub RESERVED: [u32; 5], pub TASKS_STOP: u32, pub RESERVED1: u32, pub TASKS_SUSPEND: u32, pub TASKS_RESUME: u32, pub RESERVED2: [u32; 3], pub TASKS_PREPARERX: u32, pub TASKS_PREPARETX: u32, pub RESERVED3: [u32; 51], pub EVENTS_STOPPED: u32, pub RESERVED4: [u32; 7], pub EVENTS_ERROR: u32, pub RESERVED5: [u32; 9], pub EVENTS_RXSTARTED: u32, pub EVENTS_TXSTARTED: u32, pub RESERVED6: [u32; 4], pub EVENTS_WRITE: u32, pub EVENTS_READ: u32, pub RESERVED7: [u32; 37], pub SHORTS: u32, pub RESERVED8: [u32; 63], pub INTEN: u32, pub INTENSET: u32, pub INTENCLR: u32, pub RESERVED9: [u32; 113], pub ERRORSRC: u32, pub MATCH: u32, pub RESERVED10: [u32; 10], pub ENABLE: u32, pub RESERVED11: u32, pub PSEL: TWIS_PSEL_Type, pub RESERVED12: [u32; 9], pub RXD: TWIS_RXD_Type, pub TXD: TWIS_TXD_Type, pub RESERVED13: [u32; 13], pub ADDRESS: [u32; 2], pub RESERVED14: u32, pub CONFIG: u32, pub RESERVED15: [u32; 10], pub ORC: u32,
}
Expand description

@brief I2C compatible Two-Wire Slave Interface with EasyDMA 0 (TWIS0)

Fields

RESERVED: [u32; 5]TASKS_STOP: u32

< (@ 0x00000014) Stop TWI transaction

RESERVED1: u32TASKS_SUSPEND: u32

< (@ 0x0000001C) Suspend TWI transaction

TASKS_RESUME: u32

< (@ 0x00000020) Resume TWI transaction

RESERVED2: [u32; 3]TASKS_PREPARERX: u32

< (@ 0x00000030) Prepare the TWI slave to respond to a write command

TASKS_PREPARETX: u32

< (@ 0x00000034) Prepare the TWI slave to respond to a read command

RESERVED3: [u32; 51]EVENTS_STOPPED: u32

< (@ 0x00000104) TWI stopped

RESERVED4: [u32; 7]EVENTS_ERROR: u32

< (@ 0x00000124) TWI error

RESERVED5: [u32; 9]EVENTS_RXSTARTED: u32

< (@ 0x0000014C) Receive sequence started

EVENTS_TXSTARTED: u32

< (@ 0x00000150) Transmit sequence started

RESERVED6: [u32; 4]EVENTS_WRITE: u32

< (@ 0x00000164) Write command received

EVENTS_READ: u32

< (@ 0x00000168) Read command received

RESERVED7: [u32; 37]SHORTS: u32

< (@ 0x00000200) Shortcuts between local events and tasks

RESERVED8: [u32; 63]INTEN: u32

< (@ 0x00000300) Enable or disable interrupt

INTENSET: u32

< (@ 0x00000304) Enable interrupt

INTENCLR: u32

< (@ 0x00000308) Disable interrupt

RESERVED9: [u32; 113]ERRORSRC: u32

< (@ 0x000004D0) Error source

MATCH: u32

< (@ 0x000004D4) Status register indicating which address had a match

RESERVED10: [u32; 10]ENABLE: u32

< (@ 0x00000500) Enable TWIS

RESERVED11: u32PSEL: TWIS_PSEL_Type

< (@ 0x00000508) Unspecified

RESERVED12: [u32; 9]RXD: TWIS_RXD_Type

< (@ 0x00000534) RXD EasyDMA channel

TXD: TWIS_TXD_Type

< (@ 0x00000544) TXD EasyDMA channel

RESERVED13: [u32; 13]ADDRESS: [u32; 2]

< (@ 0x00000588) Description collection: TWI slave address n

RESERVED14: u32CONFIG: u32

< (@ 0x00000594) Configuration register for the address match mechanism

RESERVED15: [u32; 10]ORC: u32

< (@ 0x000005C0) Over-read character. Character sent out in case of an over-read of the transmit buffer.

Trait Implementations

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