Struct riot_sys::NRF_QSPI_Type

source ·
pub struct NRF_QSPI_Type {
Show 31 fields pub TASKS_ACTIVATE: u32, pub TASKS_READSTART: u32, pub TASKS_WRITESTART: u32, pub TASKS_ERASESTART: u32, pub TASKS_DEACTIVATE: u32, pub RESERVED: [u32; 59], pub EVENTS_READY: u32, pub RESERVED1: [u32; 127], pub INTEN: u32, pub INTENSET: u32, pub INTENCLR: u32, pub RESERVED2: [u32; 125], pub ENABLE: u32, pub READ: QSPI_READ_Type, pub WRITE: QSPI_WRITE_Type, pub ERASE: QSPI_ERASE_Type, pub PSEL: QSPI_PSEL_Type, pub XIPOFFSET: u32, pub IFCONFIG0: u32, pub RESERVED3: [u32; 46], pub IFCONFIG1: u32, pub STATUS: u32, pub RESERVED4: [u32; 3], pub DPMDUR: u32, pub RESERVED5: [u32; 3], pub ADDRCONF: u32, pub RESERVED6: [u32; 3], pub CINSTRCONF: u32, pub CINSTRDAT0: u32, pub CINSTRDAT1: u32, pub IFTIMING: u32,
Expand description

@brief External flash interface (QSPI)



< (@ 0x00000000) Activate QSPI interface


< (@ 0x00000004) Start transfer from external flash memory to internal RAM


< (@ 0x00000008) Start transfer from internal RAM to external flash memory


< (@ 0x0000000C) Start external flash memory erase operation


< (@ 0x00000010) Deactivate QSPI interface

§RESERVED: [u32; 59]§EVENTS_READY: u32

< (@ 0x00000100) QSPI peripheral is ready. This event will be generated as a response to any QSPI task.

§RESERVED1: [u32; 127]§INTEN: u32

< (@ 0x00000300) Enable or disable interrupt


< (@ 0x00000304) Enable interrupt


< (@ 0x00000308) Disable interrupt

§RESERVED2: [u32; 125]§ENABLE: u32

< (@ 0x00000500) Enable QSPI peripheral and acquire the pins selected in PSELn registers


< (@ 0x00000504) Unspecified


< (@ 0x00000510) Unspecified


< (@ 0x0000051C) Unspecified


< (@ 0x00000524) Unspecified


< (@ 0x00000540) Address offset into the external memory for Execute in Place operation.


< (@ 0x00000544) Interface configuration.

§RESERVED3: [u32; 46]§IFCONFIG1: u32

< (@ 0x00000600) Interface configuration.

§STATUS: u32

< (@ 0x00000604) Status register.

§RESERVED4: [u32; 3]§DPMDUR: u32

< (@ 0x00000614) Set the duration required to enter/exit deep power-down mode (DPM).

§RESERVED5: [u32; 3]§ADDRCONF: u32

< (@ 0x00000624) Extended address configuration.

§RESERVED6: [u32; 3]§CINSTRCONF: u32

< (@ 0x00000634) Custom instruction configuration register.


< (@ 0x00000638) Custom instruction data register 0.


< (@ 0x0000063C) Custom instruction data register 1.


< (@ 0x00000640) SPI interface timing.

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