Struct riot_sys::NRF_TWI_Type[][src]

#[repr(C)]
pub struct NRF_TWI_Type {
Show 37 fields pub TASKS_STARTRX: u32, pub RESERVED: u32, pub TASKS_STARTTX: u32, pub RESERVED1: [u32; 2], pub TASKS_STOP: u32, pub RESERVED2: u32, pub TASKS_SUSPEND: u32, pub TASKS_RESUME: u32, pub RESERVED3: [u32; 56], pub EVENTS_STOPPED: u32, pub EVENTS_RXDREADY: u32, pub RESERVED4: [u32; 4], pub EVENTS_TXDSENT: u32, pub RESERVED5: u32, pub EVENTS_ERROR: u32, pub RESERVED6: [u32; 4], pub EVENTS_BB: u32, pub RESERVED7: [u32; 3], pub EVENTS_SUSPENDED: u32, pub RESERVED8: [u32; 45], pub SHORTS: u32, pub RESERVED9: [u32; 64], pub INTENSET: u32, pub INTENCLR: u32, pub RESERVED10: [u32; 110], pub ERRORSRC: u32, pub RESERVED11: [u32; 14], pub ENABLE: u32, pub RESERVED12: u32, pub PSEL: TWI_PSEL_Type, pub RESERVED13: [u32; 2], pub RXD: u32, pub TXD: u32, pub RESERVED14: u32, pub FREQUENCY: u32, pub RESERVED15: [u32; 24], pub ADDRESS: u32,
}
Expand description

@brief I2C compatible Two-Wire Interface 0 (TWI0)

Fields

TASKS_STARTRX: u32

< (@ 0x00000000) Start TWI receive sequence

RESERVED: u32TASKS_STARTTX: u32

< (@ 0x00000008) Start TWI transmit sequence

RESERVED1: [u32; 2]TASKS_STOP: u32

< (@ 0x00000014) Stop TWI transaction

RESERVED2: u32TASKS_SUSPEND: u32

< (@ 0x0000001C) Suspend TWI transaction

TASKS_RESUME: u32

< (@ 0x00000020) Resume TWI transaction

RESERVED3: [u32; 56]EVENTS_STOPPED: u32

< (@ 0x00000104) TWI stopped

EVENTS_RXDREADY: u32

< (@ 0x00000108) TWI RXD byte received

RESERVED4: [u32; 4]EVENTS_TXDSENT: u32

< (@ 0x0000011C) TWI TXD byte sent

RESERVED5: u32EVENTS_ERROR: u32

< (@ 0x00000124) TWI error

RESERVED6: [u32; 4]EVENTS_BB: u32

< (@ 0x00000138) TWI byte boundary, generated before each byte that is sent or received

RESERVED7: [u32; 3]EVENTS_SUSPENDED: u32

< (@ 0x00000148) TWI entered the suspended state

RESERVED8: [u32; 45]SHORTS: u32

< (@ 0x00000200) Shortcuts between local events and tasks

RESERVED9: [u32; 64]INTENSET: u32

< (@ 0x00000304) Enable interrupt

INTENCLR: u32

< (@ 0x00000308) Disable interrupt

RESERVED10: [u32; 110]ERRORSRC: u32

< (@ 0x000004C4) Error source

RESERVED11: [u32; 14]ENABLE: u32

< (@ 0x00000500) Enable TWI

RESERVED12: u32PSEL: TWI_PSEL_Type

< (@ 0x00000508) Unspecified

RESERVED13: [u32; 2]RXD: u32

< (@ 0x00000518) RXD register

TXD: u32

< (@ 0x0000051C) TXD register

RESERVED14: u32FREQUENCY: u32

< (@ 0x00000524) TWI frequency. Accuracy depends on the HFCLK source selected.

RESERVED15: [u32; 24]ADDRESS: u32

< (@ 0x00000588) Address used in the TWI transfer

Trait Implementations

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